So far we have discussed different types of
synchronous and asynchronous counters. A large variety of synchronous and
asynchronous counters are available in IC form, and some of these have been
mentioned and discussed in the previous sections.
The counters discussed hitherto count in
either the normal binary sequence with a modulus of 2N or with slightly altered
binary sequences where one or more of the states are skipped. The latter type
of counter has a modulus of less than 2N , N being the number of flip-flops
used.
Nevertheless, even these counters have a
sequence that is either upwards or downwards and not arbitrary. There are
applications where a counter is required to follow a sequence that is arbitrary
and not binary.
As an example, an MOD-10 counter may be
required to follow the sequence 0000, 0010, 0101, 0001, 0111, 0011, 0100, 1010,
1000, 1111, 0000, 0010 and so on. In such cases, the simple and seemingly
obvious feedback arrangement with a single NAND gate discussed in the earlier
sections of this chapter for designing counters with a modulus of less than 2N
cannot be used.
There are several techniques for designing
counters that follow a given arbitrary sequence. In the present section, we
will discuss in detail a commonly used technique for designing synchronous
counters using J-K flip-flops or D flip-flops.
The design of the counters basically
involves designing a suitable combinational logic circuit that takes its inputs
from the normal and complemented outputs of the flip-flops used and decodes the
different states of the counter to generate the correct logic states for the
inputs of the flip-flops such as J, K, D, etc.
But before we illustrate the design
procedure with the help of an example, we will explain what we mean by the
excitation table of a flip-flop and the state transition diagram of a counter.
An excitation table in fact can be drawn for any sequential logic circuit, but,
once we understand what it is in the case of a flip-flop, which is the basic
building block of sequential logic, it would be much easier for us to draw the
same for more complex sequential circuits such as counters, etc.
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